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Semiconductor

Verilog FPGA Program 2 (MicroBlaze2, Arty A7-35T)

This course is an advanced course in Microblaze. Through this course, you will learn how to apply Microblaze.

(5.0) 2 reviews

37 students

FPGA
MicroBlaze

This course is prepared for Intermediate Learners.

What you will learn!

  • Using MicroBlaze on FPGAs

  • Verilog program

  • w5500 interface implementation

FPGA MicroBlaze is a daunting task to study!
You can get a lot of fun with this lecture 💪

📢 Please note before taking the class.

  • This lecture is a text lecture in electronic document (PDF) format. All source files explained in the lecture are provided to those who take the lecture. The lecture source code can be downloaded from Section 0 [Material Sharing Link].
  • This lecture is a follow-up lecture to the [FPGA MicroBlaze Implementation] lecture. Details on program installation are explained in detail in the previous lecture.

Lecture Topics 📖

This lecture is about MicroBlaze applications . The MicroBlaze basics section focuses on understanding and utilizing the basics of MicroBlaze . The application section explains how to implement high-speed TCP/IP using w5500 based on utilizing Block Memory . It covers implementing user logic and interfaces with MicroBlaze and utilizing them .

This lecture uses vivado 2022.1 version . Installation details are explained in detail in the Microblaze Basics . This lecture is the content of the source code implemented and verified directly on the Arty A7 board by a developer with more than 20 years of development experience. If you fully learn and internalize the contents explained in the lecture, you can become a very capable developer. The sources downloaded from the data room are advanced codes that can be used in practice without any problems . I hope that many people in the field can use them .

I recommend this to these people.

1️⃣

Understand Verilog grammar,
Someone with FPGA design experience

2️⃣

Embedded System (FW)
Someone with development experience

What you'll learn 📚

Implementing Vivado Design Block

User logic design and simulation

Vitis application SW implementation

Download the board and check the results

Are you curious about the detailed curriculum?
  1. Overview (3)
  2. Block Memory Interface - 1 (4)
    1. Create a project (5)
    2. Block Design (7)
    3. Add constraints file (17)
    4. Application SW Implementation (12)
    5. Check Results (24)
      1. Build Project (24)
      2. Program Download (25)
  3. Block Memory Interface - 2 (29)
    1. Create a project (30)
    2. Block Design (31)
    3. User Logic Design (40)
    4. Application SW Implementation (50)
    5. Download and check results (53)
    6. Fix link script (56)
  4. w5500 interface implementation (58)
    1. System Block (59)
    2. Create a project (61)
    3. Block Design (62)
    4. User Logic Design (70)
    5. w5500 spi timing (74)
    6. Source Code Analysis (75)
      1. ax_reg module (75)
      2. eth_task module (77)
      3. eth_task simulation (87)
      4. bramW5500Top module (95)
      5. xdc file (98)
    7. Application SW Implementation (99)
      1. data_type.h (105)
      2. ax_common.h (105)
      3. w5500.c, w5500.h (105)
      4. w5500_task.c, w5500_task.h (106)
      5. w5500_socket.c, w5500_socket.h (106)
      6. w5500_loopback.c, w5500_loopback.h (107)
      7. helloworld.c (109)
    8. Check Results (110)
      1. Build Project (110)
      2. PC Network Settings (111)
      3. Program Download (112)
      4. Check Results (115)
      5. Download program to external Flash (118)
    9. Conclusion (119)
  5. References (120)
  6. Revision History (121)

Expected Questions Q&A 💬

Q. Who is the target audience for this lecture?

This course is for those who understand Verilog syntax, have experience in FPGA design, and have experience in developing embedded systems (FW). If you are new to Microblaze, please take the basic course before taking this course.

Q. Is there anything I need to prepare to attend the lecture?

This lecture will be conducted on the Arty A7-35T (100T, Digilent) practice board. If you do not have a board, please check the contents first and then purchase the board later and be sure to check it on the board.

Q. What program tools do you use?

We use the latest version, vitis 2022.1. The installation process is described in detail in the Microblaze Basics lecture.

Introducing the knowledge sharer ✒️

History

I have been working as a developer for over 20 years in large and small companies and currently run a small business. I have developed an ISP(Image Signal Processing) ASIC for CCTV and many products using FPGA such as OLED inspection equipment and DAQ(Data Acquisition System). In addition to FPGA, I have a lot of experience in FW development (STM32, PIC32, AVR, ATMEGA, etc.), circuit design, Windows Program, etc.

Recommended for
these people!

Who is this course right for?

  • Anyone interested in MicroBlaze

  • Anyone interested in FPGA

  • Anyone interested in Verilog

  • For those who want to learn advanced Verilog techniques

Need to know before starting?

  • C language

  • Verilog HDL

  • Xilinx FPGA

Hello
This is ihil

Students

1,443

Reviews

50

Rating

4.8

Courses

17

저는 지난 20여년 동안 대기업, 중소기업에서 개발자로 일해왔고

현재는 작은 기업의 대표로 있습니다.

주요 경력사항은

  • Verilog HDL을 이용한 FPGA 설계

    • CCTV용 ISP ASIC 개발 (약 10년)

    • OLED Display 검사장비 개발 (약 3년)

    • FPGA를 이용한 장비 개발

  • MCU FW

    • STM32

    • PIC32

    • AVR, ATMEGA

    • DSP (TI)

  • Windows Application Program

    • Visual Studio MFC, C++

입니다.

Curriculum

All

121 lectures

Lecture resources

are provided.

Published: 
Last updated: 

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