About aifpga - Inflearn

Introduction

안녕하세요. 설계독학의 맛비입니다.

현) Global Top10 Fabless 기업에서 HW IP 설계하고 있습니다.

반도체 설계관련 이야기들을 주제로 영상과 글을 쓰고 있습니다.
설계독학 유튜브, 설계독학 블로그, 맛비 블로그 (네이버)

Courses

Reviews

신희남
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Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
It's a really good lecture.
2233123123
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Design Dokhak Matbi's practical FPGA-based HW accelerator design (from LED control to fully connected layer accelerator design)
Design Dokhak Matbi's practical FPGA-based HW accelerator design (from LED control to fully connected layer accelerator design)
I was preparing for graduate school when I suddenly started preparing for a job, and I was at a loss as to what to do, so I found and watched Masbi's lecture. After listening to the verilog season1 and fpga lectures, I think I have a sense of how to proceed. Thank you for showing me the way. I hope you have only good things in 2025!
미키루크
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Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
Tastebee's lecture is the best lecture that can be applied to real life. I hope you will continue to provide many good lectures in the future.
냐누
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Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
I studied Verilog HDL Season1 when I was preparing for a job interview, and I completed Verilog HDL Season2 when I was in my second year of work! There are few lectures or materials in the field of system semiconductor design, especially in Korean, but I am very grateful that you have consistently created lectures!
민준희
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Design Self-study Taste's Practical Verilog HDL Season 1 (From Clock to Internal Memory)
Design Self-study Taste's Practical Verilog HDL Season 1 (From Clock to Internal Memory)
This is a lecture that I listened to with great satisfaction. I knew what the Verilog language was and understood the grammar, but I was still confused about what to do with it. I feel like I solved that through this lecture. The instructor's progress and explanation were also clear. If you think the explanation is insufficient, he always provides supplementary materials, which was really nice. I listened to it with gratitude. Thank you!

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