Let's gain basic knowledge of FPGA and experience in designing HW accelerators with Design Self-Study Taste!
What you will learn!
Verilog HDL
FPGA Accelerator Design
Basic knowledge of non-memory semiconductor design
Essential lecture for non-memory design engineers!
Gain FPGA knowledge and experience designing HW accelerators.
hello!
This is a taste of self-study design .
This is the second lecture following Velilog HDL Season 1 !
Practical Verilog HDL Season 1 (From Clock to Internal Memory)
Basic knowledge and experience in non-memory semiconductor design
If you have not completed the pre-course lectures, please pause your application for this lecture.
Please read the required documents below and, if you agree with them, apply for the course.
This should be viewed by prepared students .
Assuming that you agree to the contents of the required reading document,
I will only convey the facts .
Must-read document for Design Self-study Taste of FPGA Season 1 (click)
The FPGA Market is growing.
As you learn the FPGAs the market demands, your value will also increase.
You're currently earning a salary in the top 1% of your industry , but there are opportunities to earn even more.
We need to learn about Xilinx's FPGAs .
The FPGA market share of Xilinx (AMD) vs Altera (Intel) speaks for itself.
The following graph is a statistical graph from 2019, and this gap is widening further.
Here's why we chose Zybo/Arty Z7 for FPGA beginners:
First , you are ready to try out all the FPGA Boards.
There are well over 1,000 different types of Xilinx FPGAs.
However, if you take this course, you will gain basic knowledge that can be used with any FPGA from Xilinx.
I started out with the Zybo board, and now I'm using the Alveo Card, Xilinx's flagship FPGA for servers, and AWS's f1 instance. FPGAs are used not only in embedded but also in the server market.
Second , you can understand the design of HW accelerators using Verilog HDL and FPGA.
You can design the Core you want to accelerate.
FPGA is a chip created for hardware acceleration.
This covers the process of designing and verifying the Core that you want to accelerate.
Thank you so much for reading.
If you've read this far, you don't have to take my class.
I am confident that you will become excellent design engineers.
The choice is yours.
We look forward to seeing you in action.
Thank you, Matbi Dream.
Who is this course right for?
Those with knowledge equivalent to a 3rd or 4th year electronics major
Anyone looking for a job in the non-memory design field + working engineers!
Anyone who wants to try other designs besides digital clocks and vending machines
For those who want to learn practical FPGA
Need to know before starting?
Verilog HDL Season 1 Completed (Continued)
Students
3,441
Reviews
217
Rating
5.0
Courses
4
현) Global Top10 Fabless 기업에서 HW IP 설계하고 있습니다.
반도체 설계관련 이야기들을 주제로 영상과 글을 쓰고 있습니다.
설계독학 유튜브, 설계독학 블로그, 맛비 블로그 (네이버)
All
30 lectures ∙ (9hr 29min)
are provided.