Item: Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)
Rating: 5
Author: sunshane6726

As a job seeker, it was great to learn about the various IP designs used by people in various current positions. It's a good lecture.


sunshane6726

Let's gain experience in AMBA AXI4 design and VIP verification, which are the basis of SoC Bus, using Verilog HDL along with self-study design!

semisgdh

Design Self-study Taste's Practical Verilog HDL Season 2 (AMBA AXI4 Complete Conquest)

I'm so glad that our class was helpful in that you were able to directly learn and experience IP design used in the field 🙌
I hope that you were able to get a sense of direction, even just a little bit, through the practical-based lecture from the perspective of a job seeker.
Happy studying!!


設計独学とともにVerilog HDLを利用してSoC Busの基本となるAMBA AXI4設計とVIP検証経験を積みましょう！

입문

초급

중급이상

베릴로그 HDL

Verilog HDL

필드 프로그래머블 게이트 어레이

FPGA

amba

Embedded

設計独学味比の本番 Verilog HDL Season 2 (AMBA AXI4 完全征服)

설계독학맛비の Verilog HDL Season2 を始める前に

データ転送の基本となるValid / Readyハンドシェイク設計を攻略する

スムーズなデータ転送のための必須バッファ、FIFO設計 徹底解説

AXI4 Interface 設計のための理論と検証環境の習得

AXI4-Lite 設計 攻略

AXI4-Stream 設計 攻略

AXI4 設計 徹底攻略 (feat. 設計エンジニアなら絶対知っておくべき内容!!)

Mem copy IP. DMA（ダイレクトメモリーアクセス）設計

[プロジェクト] "Matbi Mem copy IP" を FPGA に載せてみよう！ (動作およびPerformance確認)

終わりに